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Research on the Frequency Synthesis for FPGA-based Atomic Clock

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Tutor: LiuSheng GanZhiYin
School: Huazhong University of Science and Technology
Course: Subtle manufacturing engineering
Keywords: Atomic clock miniaturization,Direct Digital Frequency Synthesizer,FPGA,Elliptic
CLC: TN74
Type: Master's thesis
Year:  2007
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Abstract:
With the rapid development of social science and technology , people have become increasingly demanding of time accuracy and stability . Although the precision of atomic clocks has reached 10-15 , but the volume is too large , it is difficult to widely used in aerospace , and civil . In order to be able to expand the application of atomic clocks , atomic clocks miniaturization increasing demands , and even in countries invisible competition . In this competitive , no doubt the United States temporarily in a leading position , and Japan followed suit , and the level of our country in this regard have also been greatly improved . Achieve the atomic clock miniaturized essential premise is to understand the internal architecture . The atomic clock is divided into the physical part and the circuit portion . The atomic clock of the physical part of miniaturization technology is currently the most important, but its circuit portion miniaturization is also very important, but also having a breakthrough point . The atomic clock circuit core is one of direct digital frequency synthesizer DDS. A task of the present subject is the use of the DDS special chip to achieve the atomic clock circuit portion , but in this circuit is used four DDS dedicated chips This is obviously may be substituted ; while the FPGA is the appropriate method . This article uses the FPGA realize the atomic clocks DDS circuit to achieve its miniaturization , as follows : first, briefly discusses the principle and its classification of the DDS , describes the role of each module between DDS and the output spectrum , highlighting the cause DDS output stray reason and analysis . Second , an overview of the EDA design flow and brief Verilog HDL, FPGA , and the Quartus II FPGA Selection . Third, the proposed FPGA-based to achieve dedicated the DDS circuit design methods , completed a 137Hz the single frequency output and a 100MHz FM output function design , by the compiler ; nine order elliptic filter design as a low-pass filter , and output the results to improvements. Fourth , the use of ModelSim waveform output simulation ; spectrum analysis with Matlab , to verify the consistency of the spectrum .
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